外文中英文翻译hdb3码.doc

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电子信息与电气工程学院学院 2014 届毕业设计外文阅读与翻译 毕业设计题目 基于FPGA的HDB3码编译码研究 外文翻译题目 The introduction of VHDL 原 文 出 处 Song Pan , Guodong Wang . VHDL Application Course 专业 电子信息与电气工程 班级 10信二 姓名 马震 学号 指导教师 肖闽进 职称 副教授 具体要求 原文应与毕业设计题目相关联,翻译工作量(英文不少于15000个印刷符号);格式符合指导书要求。 The introduction of VHDL Field Programmable Gate Arrays (FPGA) are ASIC that can be configured by the user to perform specific functions. They combine the logic integration benefits of custom VLSI with the design, production, and time-to-market advantages of standard logic IC’s. Unlike gate arrays, standard cells, and custom IC’s, programmable logic devices do not require non-recurring costs or custom factory fabrication. This permits the designers to define the logic functions of the circuit and revise these functions as necessary at a low cost. The latest wave of FPGA combines capabilities that until now were unique to gate arrays, and design benefits will now be found only in the programmable-array logic. These devices split broadly into two groups with different levels of granularity-that is, the size of their basic electronic structures varies. Some chips have large logic structures; the Logic Cell Array from Xilinx Inc., consists of 1/0 blocks surrounding configurable logic blocks that include Flip-flops as well as combinational logic. Other chips resemble conventional gate arrays in their granularity; the Act 1 and Act 2 FPGA from Actel Corp., comprises a matrix of logic modules, with the rows separated by wiring channels. The Actel architecture is based on an anti-fuse technology where logic gates and their interconnections are programmed by shorting wire segments in prescribed locations. So, they are used repeatedly. The most common FPGA architecture consists of an array of configurable lo

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