002_雾盈FPGA笔记之二AD转换电压测的量数码管显示.docx

AD转换实验——基于FPGA的电压测量数码管显示装置实验器件FPGA开发板、TLC549 AD转换芯片、共阴极七段数码管TLC549 AD转换芯片2.时序图3框图：4：想到什么再写吧Q 1：仿真波形全线飚红，程序检查了半天也没看出什么:A 1： 纠结了半天，老师走过，瞄了一眼，“没赋初值”。一语惊醒梦中人。哈哈。谨记：复位（rst_n）的时候要对所有的输出变量赋初值，否则波形会出现红线。测试的时候，要对所有的输入变量赋初值。Q 2：中间值data_temp 问题A 2：不用中间值，数据输出不是完整的数据。Q 3：随机数任务函数random的用法 Reg [7:0] num;Num = {$random} % 256 //意为num 在0——255 之间随机取数；Num = $random % 256 // 意为num 在 -255——255 之间随机取数；产生一个在min, max之间随机数的例子: num = min+{$random}%(max-min+1);记得加上延迟附：源代码module ad_ctrl( input clk, input rst_n, input ad_data, output reg ad_clk, output reg ad_cs, output reg [7:0] data_out );reg [7:0] data_temp;reg [10:0] count;// always @ (posedge clk or negedge rst_n)begin if(!rst_n) begin count = 11d0; end else begin if(count == 1500) count = 11d0; else count = count + 1b1; end end// receive data always @ (posedge clk or negedge rst_n)begin if(!rst_n) begin data_temp = 8d0; data_out = 8d0; ad_clk = 1b0; ad_cs = 1b1; end else begin case(count) 0:begin ad_clk = 1d0; ad_cs = 1d1; end 100:begin ad_clk = 1b1; ad_cs = 1b0; data_temp[7] = ad_data; end 125:begin ad_clk = 1b0; end 150:begin ad_clk = 1b1; data_temp[6] = ad_data; end 175:begin ad_clk = 1b0; end 200:begin ad_clk = 1b1; data_temp[5] = ad_data; end 225:begin ad_clk = 1b0; end 250:begin ad_clk = 1b1; data_temp[4] = ad_data; end 275:begin ad_clk = 1b0; end 300:begin ad_clk = 1b1; data_temp[3] = ad_data; end 325:begin ad_clk = 1d0; end 350:begin ad_clk = 1b1; data_temp[2] = ad_data; end 375:begin ad_clk = 1b0; end 400:begin ad_clk = 1b1; data_temp[1] = ad_data; end 425:begin ad_clk = 1b0; end 450:begin ad_clk = 1b1; data_temp[0] = ad_data; end 475:begin ad_clk = 1b0; end 500:begin ad_clk = 1b1; data_out = data_temp; end 525:begin ad_clk = 1b0; ad_cs = 1b1; end default: ; endcase endendendmodule