CPAL电路的工作原理.ppt

CPAL电路 功率时钟绝热电路 CPAL电路的基本结构 CPAL 缓冲器的基本结构如下图所示 它由两个主要部分组成： 逻辑功能电路：由四个NMOS管（N1-N4）以互补传输逻辑（CPL）的形式构成 晶体管N7和N8的作用是钳制输出节点的电压，使它不至于悬空 负载驱动电路：由两对传输门（N5,P1和N6,P2）构成 CPAL电路的基本结构 mpmos0 clk pcb pc vdd pmos w=0.132u l=0.044u ad=0.0145p as=0.0145p pd=0.352u ps=0.352u mnmos0 clk x pc 0 nmos w=0.396u l=0.044u ad=0.04356p as=0.04356p pd=0.616u ps=0.616u mpmos1 clk pc pcb vdd pmos w=0.132u l=0.044u ad=0.0145p as=0.0145p pd=0.352u ps=0.352u mnmos1 clk xb pcb 0 nmos w=0.396u l=0.044u ad=0.04356p as=0.04356p pd=0.616u ps=0.616u mnmos2 pc pcb 0 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos3 pcb pc 0 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos4 xb pc 0 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos5 x pcb 0 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos1 in in x 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos2 in inb x 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos3 inb inb xb 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos4 inb in xb 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u CPAL电路的基本结构 CPAL的门电路可由CPL功能模块代替前图缓冲器中的N5~N8构成。与/与非门、或/或非门、异或/同或门、多路选择器如下图表示： 由图我们可以看出，对CPAL电路来说，只要改变输入的NMOS电路，负载电路和钳制电路是不变的。 CPAL基本电路 mnmos1 a bb x 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos2 b b x 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos3 bb b xb 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos4 ab bb xb 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos0 x s mula 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos1 x sb mulb 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos2 xb sb mulbb 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009p pd=0.33u ps=0.33u mnmos3 xb s mulab 0 nmos w=0.066u l=0.044u ad=0.009p as=0.009