AT25DF321A-SH-T;AT25DF321A-SH-B;AT25DF321A-MH-Y;AT25DF321A-MH-T;中文规格书,Datasheet资料AT25DF321A-SH-T;AT25DF321A-SH-B;AT25DF321A-MH-Y;AT25DF321A-MH-T;中文规格书,Datasheet资料.pdf

Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface (SPI) Compatible – Supports SPI Modes 0 and 3 – Supports Atmel RapidS Operation – Supports Dual-Input Program and Dual-Output Read • Very High Operating Frequencies – 100MHz for Atmel RapidS – 85MHz for SPI 32-Mbit – Clock-to-Output (t ) of 5ns Maximum V 2.7V Minimum • Flexible, Optimized Erase Architecture for Code + Data Storage Applications – Uniform 4-Kbyte Block Erase Serial Peripheral – Uniform 32-Kbyte Block Erase Interface Serial – Uniform 64-Kbyte Block Erase – Full Chip Erase Flash Memory • Individual Sector Protection with Global Protect/Unprotect Feature – 64 Sectors of 64-Kbytes Each Atmel AT25DF321A • Hardware Controlled Locking of Protected Sectors via WP Pin • Sector Lockdown – Make Any Combination of 64-Kbyte Sectors Permanently Read-Only • 128-Byte Programmable OTP Security Register • Flexible Programming – Byte/Page Program (1- to 256-Bytes) • Fast Program and Erase Times – 1.0ms Typical Page Program (256-Bytes) Time – 50ms Typical 4-Kbyte Block Erase Time – 250ms Typical 32-Kbyte Block Erase Time – 400ms Typical 64-Kbyte Block Erase Time • Program and Erase Suspend/Resume • Automatic Checking and Reporting of Erase/Program Failures • Software Controlled Reset • JEDEC Standard Manufacturer and Device ID Read Methodology • Low