一款高电源抑制比低压差线性稳压器设计-集成电路工程专业论文.docx

A b s t ra c tW ith the p opu larity of h and-held electronic com m un ication dev ices, esp ecially tab let P C s an d sm artp h on es in recent y ears,the m ark et o f p ow er m anag em ent ch ip is grow in g. A ccord in g to in du stry research firmIH S iSu pp li, rev enue in 2 0 11 from p ow er m an agem ent sem icon d uctors is ex pected to reach $3 3.1 b illion .In the m arket o f pow er m an ag em ent ch ip , the p rop ortio n of low drop o ut lin ear regu lator (L ow D ropout R egu lator, L D O ) is ab out 10% . W ith th e d eclin e in ch ip supp ly v oltage, the sen sitiv ity o f th e ch ip p ow er supp ly ripp le is greatly im p rov ed . S o w e n eed h igh P SR (P ow er S upp ly R ejection ，P S R ) p ow ers.T h e ch aracteristics of h igh P S R L D Oreally fit th is requ irem ent,th erefore，this th esis designed a low d ropout linear reg ulator w ith m ax im um o utp ut cu rrent 15 0m A an d h igh P S R .F irst,th e th esis discu sses the im p lem entation s of th e h igh p ow er supp ly rejection L D O . A n aly zes th e po w er su pp ly rejection characteristics of the sing le-stag e p ow er transistor L D O in th e w ho le frequ en cy range,an d lists sev eral p ub lished L D O circuit structures w ith h igh p ow er sup p ly rejectio n .T h en ，th e thesis an aly zes the L D O lo op com p en sation m eth o d s,and d iscu sses thep ros an d con s o f sev eralcom p ensation m eth o ds.F inally , a h ig h p ow er sup p ly rejection ratio L D O w as im p lem ented w ith U M C , 0 .5 (am LV T C M O S p rocess.T he inp ut v o ltage of th e L D O is from 2 .5V to 5 .5V , and the output v o ltag e is 2V to 3 .6V , w ith th e m ax im um lo ad cu rrent o f 150m A . T he sim u lation s of th e circu it at all p rocess corn ers, d ifferent tem p erature an d vo ltage ， sh o w th at th e P S R o f th is L D O is le ss th a n -8 0 d B a t 10 k H z a n d is le ss th a n -4 0 d B Inthe w h o le freq u en cy range.K eyw ords: L ow D rop o