74HC04六输入非门.pdf

INTEGRATED CIRCUITS DATA SHEET 74HC04; 74HCT04 Hex inverter Product specification 2003 Jul 23 Supersedes data of 1993 Sep 01 Philips Semiconductors Product specification Hex inverter 74HC04; 74HCT04 FEATURES DESCRIPTION • Complies with JEDEC standard no. 8-1A The 74HC/HCT04 are high-speed Si-gate CMOS devices • ESD protection: and are pin compatible with low power Schottky TTL HBM EIA/JESD22-A114-A exceeds 2000 V (LSTTL). They are specified in compliance with JEDEC MM EIA/JESD22-A115-A exceeds 200 V. standard no. 7A. The 74HC/HCT04 provide six inverting buffers. • Specified from −40 to +85 °C and −40 to +125 °C. QUICK REFERENCE DATA GND = 0 V; T = 25 °C; t = t ≤ 6.0 ns. amb r f TYPICAL SYMBOL PARAMETER CONDITIONS UNIT HC04 HCT04 tPHL/tPLH propagation delay nA to nY CL = 15 pF; VCC = 5 V 7 8 ns CI input capacitance 3.5 3.5 pF CPD power dissipation capacitance per gate notes 1 and 2 21 24 pF Notes 1. CPD is used to determine the dynamic power dissipation (PD in µW).