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数字滤波器设计译文文_毕业设计(论文)
附件D:译文原文 重庆大学本科学生毕业设计(论文)附件 D PAGE \* MERGEFORMAT 2D PAGE \* MERGEFORMAT 3附件D:FPGA IMPLEMENTATION OF DIGITAL FILTERSChi-Jui Chou, Satish Mohanakrishnan, Joseph B. EvansTelecommunications Information Sciences LaboratoryDepartment of Electrical Computer EngineeringUniversity of KansasLawrence, KS 66045-2228ABSTRACTDigital filtering algorithms are most commonly implemented using general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips and application-specific integrated circuits (ASICs) for higher rates. This paper describes an approach to the implementation of digital filter algorithms based on field programmable gate arrays (FPGAs).The advantages of the FPGA approach to digitalfilter implementation include higher sampling rates than are availablefrom traditional DSP chips,lower costs than an ASIC for moderate volume applications, and more flexibility than the alternate approaches.Since many current FPGA architectures are in-system programmable, the configuration of the device may be changed to implement differentfunctionality if required. Our examples illustrate that the FPGA approachis both flexible and provides performance comparable or superior to traditional approaches.1. INTRODUCTIONThe most common approaches to the implementation of digital filtering algorithms are general purpose digital signal processing chips for audio applications, or special purpose digital filtering chips andapplication-specific integrated circuits (ASICs)for higher rates [9, 14]. This paper describes an approach to the implementation of digital filter algorithms on field programmable gate arrays (FPGAs).Recent advances in FPGA technology have enabled these devices to be applied to a variety of applications traditionally reserved for ASICs. FPGAs are well suited to datapath designs,such as those encountered in digital filteringapplications. The density of the new programmable devices is
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