基于verilite的信号源设计（毕业学术论文设计）.doc

摘 要 信号源在电子电路实验和设备检测中有着广泛的应用。随着科技的进步，现代信号源的设计越来越复杂，但一般都有固定的设计流程，并由一些基本的单元组成。本设计利用Verilite板上的FPGA来生成正弦波数据信号，再用数模转换器把数字信号转换成模拟信号。首先利用ISE开发环境用verilog语言设计相关程序，并进行编译生成bit文件，用VeriCom进行调试，用示波器观察实际波形。但是由于vercom的特点，导致设计无法全速执行，需要自己编写控制软件以代替vericom，以实现PC对FPGA的控制。 关键词：信号源、FPGA、VeriCom仿真、Verilite ABSTRACT The design of signal source has many applications in the area of electric circuit experience and equipment examination. As the development of science, the design of signal source is more and more complex. But, all is designed following the fix steps, and all is composed by the base units. This time, we will use the FPGA on the Verilite board to produce a cosine wave. Then, we use the D/A converter to transform the digital signal to the analogy signal. Firstly, we design a program using the verilog language on the software ISE. It generate a file of *.bit. After downloading it into the Verilite board, the result of the design will be simulated by VeriCom. At last, we will see the wave in an oscilloscope. Because of the character of the Vericom, the design can not implement in real speed. So we should design a program to instead the Vericom to control the FPGA by PC.  Key Words：signal source, FPGA, VeriCom simulation，Verilite 目 录 TOC \o 1-3 \h \z \u HYPERLINK \l _Toc327283057 1 引 言 PAGEREF _Toc327283057 \h 1 HYPERLINK \l _Toc327283058 1.1 研究背景 PAGEREF _Toc327283058 \h 1 HYPERLINK \l _Toc327283059 1.2 研究对象、目的及意义 PAGEREF _Toc327283059 \h 1 HYPERLINK \l _Toc327283060 1.3 本文主要内容安排 PAGEREF _Toc327283060 \h 2 HYPERLINK \l _Toc327283061 2 信号源设计原理 PAGEREF _Toc327283061 \h 3 HYPERLINK \l _Toc327283062 2.1相关概念及原理的概述 PAGEREF _Toc327283062 \h 3 HYPERLINK \l _Toc327283063 2.1.1可编程器件FPGA简介 PAGEREF _Toc327283063 \h 3 HYPERLINK \l _Toc327283064 2.1.2可编程逻辑器件Spartan-3E FPGA的结构及特点 PAGEREF _Toc327283064 \h 3 HYPERLINK \l _Toc327283065 2.1.3 FPGA开发软件ISE的简介 PAGEREF _Toc327283065 \h 3 HYPERLINK \l _Toc327283066 2.2信号源设计思路 PAGEREF _Toc327283066 \h 5 HYPERLINK \l _Toc