超大规模集成电路2017年秋段成华老师第一次作业.doc

Assignment 1: 冉文浩 201718013626016 Give a formal or descriptive definition for each of the following terms. ITRS,1 Gate-Equivalent,1 Technology Nodes,1 Feature size,1 IC design complexity sources,1 Behavioral representation,1 Abstraction hierarchy,1 IC design,1 Synthesis,1 Refinement,1 System-level synthesis,1 Logic synthesis,1 Layout synthesis,1 Partial design tree, Design window,1 Digital design space,1 Static timing analysis,1 Behavioral simulation,1 Post place and route simulation,1 Composition-based approach. 1 Access the Internet for information about Daniel D. Gajski’s “Y-chart” methodology for integrated circuits design. According to your investigation of the related research papers and/or technical reports, please summarize the “Y-chart” theory, including (1) design representation domains, (2) design abstraction hierarchy and (3) design activities. References must be listed at the end of your report. Write a summary in Chinese of the paper “A New Ear in Advanced IC Design” (in less than 200 characters). 1. Give a formal or descriptive definition for each of the following terms. ITRS：International Technology Roadmap for Semiconductor(国际半导体技术发展路线图) Gate-Equivalent：A gate equivalent (GE) stands for a unit of measure which allows to specify manufacturing-technology-independent complexity of digital electronic circuits. It corresponds to a two input NAND gate Technology Nodes：DRAM 结构里第一层金属的金属间距(pitch)的一半 Feature size：roughly half the length of the smallest transistor(芯片上的最小物理尺寸) IC design complexity sources: It includes four main metrics：reliability、cost、performance and power consumption. It also includes four complexity sources：large size、variability and reliability、power dissipation and heterogeneity. Behavioral representation: Represents a design as a black box and its outputs in terms of its input and time. Indicates no geometrical information or structure information. Tables the form of text, math or algorithm. Abstraction hierarchy： Abstraction hierarchies