《北邮电路综合实验报告——串行口数据传输的仿真及硬件实现》.docVIP

北京邮电大学 信息与通信工程学院 电路综合实验报告 串行口数据传输的仿真及硬件实现 姓名： 学号： 班内序号： 班级： 指导老师： 日期：2014年10月10日 摘要： 本实验模拟了现代数字逻辑电路中的数据传输过程。使用连续的代表0、1的高低电平作为数字信号，将该数字信号从输出端发送到接收端，并分别用串行、并行两种方式进行锁存，检测。本实验模拟了序列信号的发生装置、串并转换装置、串行并行两种方式的检测装置、锁存输出和控制电路，实现了一个简单的串行口数据传输模型。在此试验中，通过对常见芯片的组合实现功能，将一串由0、1组成的数字信号进行传输、转换、检测，使之显示在数码管上成为可读信息。并且，还实现了对此电路显示的控制，使数码管在满足条件的情况下才点亮。在实验中，还使用了QuartusⅡ对设计的电路进行了仿真模拟。 关键字： 数据传输、串并转换、数据检测、QuartusII Abstract： This experiment simulated data transfer in modern digital logic circuit. Digital signal was transferred from the output terminal to the receiving end, which was consisted of continuous high or low level represent 0 and 1 as digital signal, and latch, test it through serial or parallel mode. Our experiment simulated the producing equipment of sequence signal, the signal conversion module, testing module of serial and parallel mode, latch output and control circuit. It implements a simple serial port data communication model. In the experiment, we use the combination of simple chips to realize the function that transport, transfer and test a sequence of the digital signal consisting of 0 and 1, and display it on LED Segment Displays. In addition, we realize the control of display. The LED Segment Displays works only in specific conditions. We also conduct simulations on QuartusⅡ. Keywords: Data transmission, String conversion, Data detection, Quartus II 目 录 一、实验目的········································4 二、实验仪器········································4 三、实验内容及设计任务···························4 四、实验设计········································6 1.分频电路········································6 2.序列信号发生器··································6 3.串、并转换模块··································8 4.串行检测模块····································9 5.并行检测模块····································11 6.控制电路········································11 7.锁存显示模块····································12 8.总体电路图和仿真结果····························12 五、实验的硬件实现及结果分析···················14 六、遇到的问题及解决办法·············