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课程设计同步二进制加法计数器设计及仿真
集成电路设计报告
同步二进制加法计数器的设计与仿真
院 系： 材料与光电物理学院
专 业： 微电子学一班
学 号： 2007700810
姓 名： 郭 俊
指导教师： 唐明华 教授
报告提交日期： 2010 年 9 月
目 录
摘要 ····························································································· 1
关键词 ······································································································· 1
1 引言 ································································································· 2
2 时序逻辑电路······································································· 4
2.1 时序逻辑电路概述············································································· 4
2.2 同步时序逻辑电路的一般设计方法······················································ 5
3 设计··················································································7
3.1 二进制计数器原理······························································································ 7
3.1.1 T触发器·········································································· 7
3.1.2 同步二进制加法计数器的原理··············································· 7
3.2 二进制计数器设计······························································· 8
3.2.1 四位二进制计数器的设计·························································
3.2.2 检查设计的电路能否自启动··························································13
4 仿真··········································································· ············································· 14
4.1 仿真原理 ············································································· 14
4.2 仿真结果与分析 ······························································· 15
5 硬件描述语言VHDL设计及仿真·································17
6 结论 ····················································································22
7 体会与展望 ···········································································23
参考文献 ···············································································24
致谢 ···························································
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