基于Verilog的I2C控制器的设计与综合-物理电子学专业论文.docxVIP

基于 Verilog 的 I2C 控制器的设计与综合 摘 要 传统的具有 I2C 协议功能的芯片在功能上具有一定的局限性，比如只能控制键盘或数 码管等，这些专用集成电路并不能满足产品中各种各样的需求，因此，本课题在 FPGA 上 设计了基于 Verilog 的 I2C Slave 控制器，使其可以控制各种各样的与控制器相连的设备。 该控制器主要功能是从 I2C 总线上接收数据，控制器先判断接收到的地址数据与自身地址 相匹配，匹配后再对接收到的控制数据进行分析，根据所收到的控制数据对控制器所连接 外设进行控制。 通过在 Modelsim 里编写 Testbench 模拟在 I2C 总线上发送数据，用来对 I2C Slave 控制 器顶层模块发送激励信号来验证模块的正确性。除此之外还在 Modelsim 中编写了各个模 块的激励信号，分别对各个模块进行验证。最后搭建了硬件测试平台，通过单片机向 I2C 总线上发送数据，用 Cyclone II 系统的 EP2C5T144 芯片做成的开发板接收总线上的数据， 根据接收到的数据来控制与板子相连的数码管和发光二极管，并让单片机发送各种数据来 测试所设计的 I2C Slave 控制器。结果表明，控制器模块设计正确，并已经达到设计目的， 可以正确的从总线上接收数据并控制外设。 关键词：I2C 控制器，Verilog，FPGA，数字钟 i THE DESIGN AND SYNTHESIS OF I2C CONTROLLER BASED ON VERILOG ABSTRACT The traditional function of ASIC chips with I2C protocol has some limitations,such as can only control the keyboard or digital and so on.these ASIC can not meet the needs of a variety of products,so,this topic designed a I2C Slave controller with verilog HDL on FPGA,in order to control the various devices connected to the controller.The controller mainly function is to receive data from the I2C bus,the controller receives the first address data and determine its own address is match with the address,then the controller analysis of the received control data and control the connected outside with this control data. Writting testbench in Modelsim to simulate send data through I2C bus to the top of the I2C Slave controller module and to verify the correctness of the module. In addition to this,it also write excitation signal of each module respectively for authentication. Finally built hardware test platform,through the microcontroller send data to the I2C bus,the system with the Cyclone II development board made EP2C5T144 chip receives data on the bus,according to the received data to control connected with the board and the LED digital tube,and let the microcontroller to send a variety of data to test the I2C Slave controller.The results show that the controller module design is correct,and has reached the design p