16进制计数器的电路设计及版图实现.doc

PAGE \* MERGEFORMAT PAGE \* MERGEFORMAT II PAGE \* MERGEFORMAT I PAGE \* MERGEFORMAT I 16进制计数器的电路设计及版图实现 摘 要 集成电路设计技术是现在信息时代的关键技术之一，当今的超大规模集成电路（VLSL）设计也已经离不开计算机辅助（CAD）。Tanner就是CAD软件的一种，它是由Tanner Research公司开发的基于windows平台的用于集成电路设计的工具软件，该软件功能强大，从电路设计、分析模拟到电路布局都可实现。本设计就是基于tanner软件实现十六进制计数器的电路图设计及版图绘制。根据电路的逻辑功能可知，十六进制计数即从0000一直计数到1111，这里我选用通过四片D触发器级联实现，每输入一个CP脉冲，D触发器就翻转一次，如果触发器初始状态为0，在输入第一CP脉冲的时候，第一级触发器置1，后面几级触发器还保持在0状态，得到0001；在第二个CP脉冲上升沿时，触发器触发，第二级触发器置1，其他的触发器置0，得到0010，依次类推，从而完成0000~1111 十六位计数。本设计正是利用tanner做出D触发器子模块并级联成完整电路，然后绘制版图并仿真，验证结果与预期相同。 关键词：CAD；TANNER；D触发器；16进制计数器 16进制计数器的电路设计及版图实现 PAGE \* MERGEFORMAT PAGE \* MERGEFORMAT II PAGE \* MERGEFORMAT PAGE \* MERGEFORMAT III Circuit Design and Layout Implementation of Hexadecimal Counter Abstract IC design technology is now one of the key technologies of the information age, todays ultra-large scale integrated circuit (VLSL) has been inseparable from computer-aided design (CAD). Tanner is a CAD software, which is developed by the Tanner Research windows-based platform for integrated circuit design tool software, which is powerful, the circuit design, analysis, simulation of the circuit layout can be realized. This design is based on the software tanner to implement hexadecimal counter circuit design and layout drawing. According to the function of logic circuit shows that hexadecimal counting is counted from 0000 to 1111 , and here I cascad four D flip-flop, D flip-flop will toggle each time once your put the CP pulse , if the initial trigger state is 0, then, the first level trigger is set to 1 after input of the first CP pulse, and other trigger remained at 0 state, to be 0001; in the second CP pulse rising edge ,flip-flop will be triggered, the second flip-flop is set to 1, the other flip-flop is set to 0, to get 0010, and so on, thus completing the 0000 to 1111 sixteen counts. This design is using tanner to make a D flip-flop circuit module and cascade into a complete circuit， and then draw the