光互连限幅放大器与矩形Y分支光波导的设计-集成电路系统设计专业论文.docxVIP

摘要 摘要 摘要 随着集成电路技术的飞速发展，芯片特征尺寸越来越小，芯片速度越来越快， 而传统的电互连方式因存在串扰、功耗以及带宽等因素的限制，面临着难以满足 高性能芯片要求的困境。光互连因其本身具有的抗干扰、低功耗及高带宽等特性， 将成为未来芯片间(内)互连的主要连接方式之一。 在芯片间光互连系统中，光接收机主放大器与光波导是其重要的组成部分。 本文主要完成了基于 0.35μm CMOS 工艺的主放大器电路设计、前端仿真分析，同 时在研究光波导理论的基础上完成了矩形 Y 分支光波导的仿真分析。 主放大器主要有自动增益控制电路与限幅放大电路两种实现方式，因限幅放 大电路具有电路设计简单、芯片面积小及功耗低等优点，本文选取限幅放大电路 作为主放大器的电路结构。因 0.35μm CMOS 工艺的特征频率 fT 最高为 13.5 GHz， 为实现 2.5Gb/s 的传输速率，必须对电路进行带宽扩展。采用有源负反馈技术及 fT 倍增技术扩展电路带宽，通过 Cadence Spectre 对电路进行仿真分析，电路小信号 增益为 37.39dB，-3dB 带宽为 1.75GHz，通过对电路眼图的分析表明电路同时具有 较好的性能，电路可以良好的工作在 2.5Gb/s 的工作速率上。 在对光波导进行理论分析的基础上，本文主要对波导损耗进行了研究分析。 基于有限差分光束传输法，论文通过 BeamPROP 仿真软件对矩形 Y 分支光波导进 行了仿真，并对波导损耗进行了分析，为波导的进一步研究以及实际制作打下了 良好的基础。 关键字： 光互连 主放大器 限幅放大器 光波导 Abstract Abstract Abstract With the rapid development of the integrated circuits, the feature size of the chip is getting smaller and the velocity is getting faster. Due to the presence of crosstalk, power consumption and bandwidth limitation, the traditional electrical interconnection has been difficult to meet the high-performance requirements. Optical interconnection has become the main interconnection between (within) chips because of its inherent anti-jamming, low-power and high-bandwidth characteristic. The main amplifier of the optical receiver front-end and the optical waveguide are important parts of the chip-to-chip optical interconnect system. This paper mainly completed the research and simulation analysis of the rectangle Y-branch waveguides, at the same time, it also completed the design and simulation analysis of the main amplifier circuits based on the 0.35μm CMOS process. The main amplifier can be implemented by the automatic gain control circuits and the limiting amplifier circuits. This paper selects limiting amplifier circuit as the circuit configuration of the main amplifier, because of it has simple circuit structure, small chip area and low power consumption. As the characteristic frequency fT of the 0.35μm CMOS process is up to 13.5 GHz, the bandwidth of the circuit sh