微电子电路microelectroniccircuit标准课件sedra著作.ppt

sedr42021_1408.jpg sedr42021_1409.jpg sedr42021_1410.jpg sedr42021_1411.jpg sedr42021_1412.jpg sedr42021_1413.jpg sedr42021_1414.jpg sedr42021_1415.jpg sedr42021_1416.jpg sedr42021_1417.jpg sedr42021_1418.jpg sedr42021_1419.jpg sedr42021_1420.jpg sedr42021_1421.jpg sedr42021_1422.jpg sedr42021_1423.jpg sedr42021_1424.jpg sedr42021_1425.jpg sedr42021_1426.jpg sedr42021_1427.jpg sedr42021_1428.jpg sedr42021_1429.jpg sedr42021_1430.jpg sedr42021_1431.jpg sedr42021_1432.jpg sedr42021_1433.jpg sedr42021_1434.jpg sedr42021_1435.jpg sedr42021_1436.jpg sedr42021_1437.jpg sedr42021_1438.jpg Figure 14.30 The simplified internal circuit of the LM380 IC power amplifier. (Courtesy National Semiconductor Corporation.) Figure 14.31 Small-signal analysis of the circuit in Fig. 14.30. The circled numbers indicate the order of the analysis steps. Figure 14.32 Power dissipation (PD) versus output power (PL) for the LM380 with RL = 8 W. (Courtesy National Semiconductor Corporation.) Figure 14.33 Structure of a power op amp. The circuit consists of an op amp followed by a class AB buffer similar to that discussed in Section 14.7.1. The output current capability of the buffer, consisting of Q1, Q2, Q3, and Q4, is further boosted by Q5 and Q6. Figure 14.34 The bridge amplifier configuration. Figure 14.35 Double-diffused vertical MOS transistor (DMOS). Figure 14.36 Typical iD–vGS characteristic for a power MOSFET. Figure 14.37 The iD–vGS characteristic curve of a power MOS transistor (IRF 630, Siliconix) at case temperatures of –55°C, +25°C, and +125°C. (Courtesy Siliconix Inc.) Figure 14.38 A class AB amplifier with MOS output transistors and BJT drivers. Resistor R3 is adjusted to provide temperature compensation while R1 is adjusted to yield the desired value of quiescent current in the output transistors. Resistors RG are used to suppress parasitic oscillations at high frequencies. Typically, RG = 100 W. Figure 14.39 Capture schematic of the class B output stage in Example 14