基于FPGA的数据采集系统设计与实现.doc

PAGE PAGE I 摘 要 本文旨在探讨一种基于FPGA的数据采集系统设计与实现方式，其基本出发点是根据A/D和D/A器件的工作原理，结合FPGA的高速、易控制和可塑性强等优势，对高速数据采集系统设计有一定研究意义。本系统采用Altera公司的Cyclone II的FPGA可编程器件为核心，其系统的设计实现包括硬件设计和软件设计两部分。硬件设计部分包括时钟、按键、显示、A/D采样、D/A输出、存储配置等单元电路，软件设计部分则依靠Quartus II集成开发系统，采用自顶向下的模块化设计思想，运用VHDL语言进行控制系统设计，其中本文重点阐述了A/D和D/A模块的硬件和软件设计过程，软件设计采用了状态机控制其工作，极大的提高了系统的工作性能，同时对系统各个设计模块都进行了分析、综合、编译、时序分析和仿真分析，整个系统联调通过了系统硬件测试，该系统设计能够有效地对0-10k频率和幅值为0-5v信号进行有效采集并输出无失真，同时通过LED数码管精确显示当前采集的电压值。 关键字：FPGA,数据采集，VHDL ABSTRACT This paper is for the purpose of discussing one kind based on the FPGA data acquisition system design and the research, the basic starting point is based on A/D and D/A devices working principle, combination of FPGA high-speed, easy control and plasticity strong advantages of high-speed data collection system design have a certain significance. The system uses Alteras FPGA of the Cyclone II FPGA as the core design of their systems, including hardware design and software design in two parts. Part of hardware design, including clocks, buttons, display, A/D sampling, D/A output, storage and configuration circuit units, software design rely on the Quartus II integrated development system that uses top-down modular design, the use of VHDL control system design languages, of which this article focuses on the A/D and D/A modules hardware and software design process, software design uses a state machine to control their work, great work to improve the system performance, all at the same time the system Design modules are analyzed, integrated, compiler, timing analysis and simulation analysis, the entire system through the test to the system hardware, the system is designed to effectively 0-10k frequency and amplitude for the 0-5v signal acquisition and output without distortion, and accurate LED digital tube displays the current voltage value with acquisition. Keywords: FPGA, Data Acquisition, VHDL 目 录 TOC \o 1-4 \h \z \u HYPERLINK \l _Toc200564395 第1章 绪论 1 HYPERLINK \l _Toc200564396 1.1 课题背景及依据 PAGERE