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Assembling Y86 Program Generates “object code” file eg.yo Actually looks like disassembler output unix yas eg.ys Y86 Object Program Y86 Object Program Simulating Y86 Program Instruction set simulator Computes effect of each instruction on processor state Prints changes in state from original unix yis eg.yo Simulating Y86 Program RISC vs. CISC ISA Instruction set architecture Instructions supported by a particular processor Their byte-level encodings CISC Complex instruction set computer RISC Reduced instruction set computer CISC Involved from the earliest computers Mainframe and Minicomputers By the early 1980s their instruction sets had grown quite large Manipulating circular buffers performing decimal arithmetic evaluating polynomials Microcomputer Appeared in 1970s, had limited instruction sets constrained by number of transistors on a single chip By the early 1980s, followed the path to increase their instruction sets RISC Developed in the early 1980s philosophy One are able to generate efficient code for a simpler form of instruction set Complex instructions are hard to generated with a compiler and seldom used John Cocke (1925-2002), 1987 ACM Turing Award David Patterson, UC Berkeley John Hennessy, Stanford U RISC Marketing issues determine the success of the ISAs X86 wins in high-end server, desktop, laptop machines RISC win in market of embedded processors * IBM Power IBM and Motorola PowerPC Sun Microsystems SPARC Digital Equipment Corporation Alpha Hewlett Pack Pa-risc MIPS Technologies MIPS Acorn Computers Ltd ARM RISC vs. CISC CICS Early RISC A large number of instructions Many fewer instructions (100) Some instructions with long execution times No instruction with a long execution time Variable-length encodings. Fixed-length encodings Multiple formats for specifying operands Simple addressing formats Arithmetic and logical operations can be applied to both memory and register operands Arithmetic and logical operations only use register operands. l
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