基于FPGA的串行通讯设计毕业论文.doc

内蒙古科技大学毕业设计说明书（毕业论文） 毕业设计说明书 基于FPGA的串行通讯设计 摘 要 FPGA是大规模集成电路技术发展的产物，是一种半定制的集成电路。与单片机相比FPGA的运行速度快并且有处理更复杂功能的能力。FPGA结合计算机软件技术(EDA技术)可以快速、方便地构建数字系统。通用异步接收发送器(UART)是一种短距离串行传输接口，在数字通信和控制系统中得到了广泛应用。本设计使用Altera 的FPGA 器件，将UART的核心功能嵌入到FPGA内部，不但实现了电路异步通讯的主要功能，而且使电路更加紧凑、稳定、可靠。 本设计包含UART 的发送模块、接收模块和波特率发生器，所有功能的实现全部采用Verilog HDL硬件描述语言来进行描述。在QuartusII 软件开发环境下实现文件编译，并在Modelsim 环境下进行了功能仿真。结果表明该UART 功能正确、稳定、可靠, 可以很好地应用于异步串行通讯中。 关键词： FPGA；通用异步接收发送器（UART）；Verilog HDL 内蒙古科技大学毕业设计说明书（毕业论文） The Design of Serial Communication based on FPGA Abstract FPGA is a product of large-scale integrated circuit technological development, it is a semi-custom integrated circuits .FPGA runs faster than SCM, it has the capacity of dealing with more complex functions.FPGA combined with computer software technology (EDA technology) can be quickly and easily build digital systems.UART(Universal Asynchronous Receiver Transmitter) is a short-haul serial communication interface which is widely used in digital communication and control system. This design uses Alteras FPGA device, the UARTs core function is embedded into the FPGA,which not only achieves main asynchronous communication function of the whole circuit , but also makes the whole circuit simple , stable and reliable. This design includes the Transmitter Logic,the Receiver Logic and the Baudrate Generator. All functions are given by VerilogHDL. All documents were compiled under QuartusII environment and the functions are simulated under Modelsim environment .The result of the simulations and synthesis shows that the UART’s function correctly, stable, reliable, and can be widely used in asynchronous serial communication. Key words : FPGA；UART；Verilog HDL 目 录 TOC \o 1-3 \h \z \u 摘 要 h I Abstract h II 第一章 绪论 h 1 1.1 异步串行通讯概述 h 1 1.2 FPGA在串行通讯中的应用 h 1 1.3 选题背景和意义 h 2 第二章 FPGA及其配置 h 3 2.1 FPGA的基本结构及其特点 h 3 2.1.1 FPGA的基本结构介绍 h 3 2.1.2 FPGA的特点 h 5 2.2 FPGA的配置 h 5 2.2.1 FPGA的配置方式 h 6 2.2.2 FPGA配置流程及配置引脚定义 h 7 2