可编程硬件描述语言VHDL Quartus 八进制计数器源代码.docx

VHDL Quartus 八进制计数器源代码 LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_ARITH.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY COUNTER_8 IS PORT ( CLK : IN STD_LOGIC; RS : IN STD_LOGIC; COUNT_OUT : OUT STD_LOGIC_VECTOR(3 DOWNTO 0) ); END COUNTER