aec6 Electro-Thermally Induced Parasitic Gate Leakage (GL)汽车电子委员会.pdf

ISTFA ’93: The 19th International Symposium for Testing Failure Analysis, Los Angeles, California, USA / 15-19 November 1993 Electro-Thermally Induced Parasitic Gate Leakage (GL) R.D. Mosbarger Delco Electronics Kokomo, Indiana Abstract Failed parts recover and become fully functional when exposed to an unbiased high temperature-oven bake, during The combination of new operational environments, assembly de-soldering operations, or when the part was decapped and processes, new circuit designs, and the sophistication of the die was exposed to normal levels of light. It has been encapsulation materials presents new opportunities for determined that the failures were the result of a trapped previously unknown failure modes. Electro-Thermally charge phenomenon which resulted in a degradation of input Induced Parasitic Gate Leakage (ETIP-GL or GL) is an pin impedance and subsequent logic failures. Improvements environment and materials induced failure mechanism that were made in process and handler grounding and the number adversely affects the performance and reliability of an of failures was reduced. The mechanism of failure was integrated circuit. GL is a trapped-charge phenomenon identified. A method to