JXPBSS138VRG_E靖芯科技 恒佳盛电子一级代理商.pdf

DESCRIPTION SCHEMATIC DIAGRAM This MOSFET has been designed to minimize D the on-state resistance(RDS(on)) and yet maintain superior switching performance, making it ideal for high efficiency power management applications. G GENERAL FEATURES  VDS = 50V,ID = 0.22A S RDS(ON)(Typ.)=0.56Ω @VGS=10V RDS(ON)(Typ.)=0.61Ω @VGS=4.5V PIN ASSIGNMENT  Dual N-Channel MOSFET  Low Gate Threshold Voltage SOT-23  Low Input Capacitance (TOP VIEW)  Fast Switching Speed D 3 APPLICATION  PWM applications S S  Load switch PACKAGE 1 2 G S  SOT-23 ORDERING INFORMATION Part Number Storage Temperature Package Marking Devices Per Reel JXPBSS138VRG -55°C to +150°C SOT-23 SS 3000 ABSOLUTE MAXIMUM RATINGS (TA=25℃ unless otherwise noted) parameter symbol limit unit Drain-source voltage VDS 50 V Gate-source voltage VGS ±20 V T =25°C