工艺库数字与模拟anmultiplevt.pdfVIP

MultipleVtFlowforLeakagePowerReduction/Release4.0

Introduction

At130nmandbelowtechnology,theleakagepowerbecomesa

significantcontributortotheoverallpowerdissipationofthechip.In

ordertominimizetheleakagepower,amultipleVtflowisproposed.

ThemultipleVtlibrariesareneededinmultipleVtflow,which

containNVT,logicallyequivalentLVT(lowVtwithhighleakage),

andlogicallyequivalentHVT(highVtwithlowleakage)cells.The

goalofthemultipleVtflowistoobtainanoptimaldesignwiththe

umperformanceandtheminimumleakagepower.

MultipleVtFlow

Currentcommercialtoolsareeithertiming-consumingorunableto

reduceenoughleakagepowerwhilehandlingthemultipleVt

libraries.Besides,theresultisnotguaranteedafterpost-route

iterations.Intheproposedflow,weuseonlyLVTcellsinallphases

ofdesignflowfortoolstofullyoptimizethedesignfortimingand

area.Afterfinalplacementandrouting,weperformswappingof

cellstoNVT/HVTwithoutcausingnewtimingviolations.Thecell

swappingwillnotchangethelayoutandRCnetworksincethe

geometryofthecelliskeptthesameinmultipleVtlibraries.Figure1.

showsthedifferencweenourflowandcommercialflow.

Theadvantageofourflowissummarizedbelow:

a.Noneedtoconsidermultiplelibraries,andalleffortisputon

optimizingforareaandtiming.

b.Theprocessofswappingcellsisfastandtheresultis

guaranteed.

c.Simpletasktoreplacecellsafterfinalroutingsinceitwillnot

affectlayout.

Thechallengeofourflowishowtoswapcellstominimizeleakage

withoutcausingtimingviolations.

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MultipleVtFlowforLeakagePowerReductio